Realize that I am NOT asking about how MMIO (memory mapped input/output) is set up, but asking how it is mapped, I.e, what maps it exactly? Not what is mapped to what, I can Google a memory map for that.
What I want to know is, such as once you first power on the computer, what exactly "maps" the memory, or how does that work?
Basically, what sets up the memory or "maps" it for certain purposes?
I had originally thought it was boot firmware, like BIOS or EFI/UEFI, but another user on another site told me it had to do with a memory controller. Is that true?
But how, if in more detail, if not too much to ask? Thanks very much to any who clarify!
22 Answers
There are a few steps. First, the BIOS discovers all the devices on the system. Then it interrogates each device to decide whether the BIOS will set that device up and, if so, determine how much memory address space, if any, the device needs. The BIOS then assigns space to each device and program's the address decoder by writing to its BAR (base address register).
In sum, the BIOS:
Discovers the device's BARs (base address register). Each device can have up to six BARs.
For each BAR, asks the BAR how much address space it needs.
Assigns the BAR a block of address space.
Programs the BAR with the base address of the chosen block of memory address space.
The device's address decoder now responds to reads and writes inside that block of address space. From then on, when the CPU (or any device in the system capable of DMA) reads from or writes to any address inside that range, the device will respond to the request.
Note that no memory is assigned to the device. The memory is on the device. It's memory address space that's assigned to the device.
You can, of course, find the process detailed on Wikipedia's PCI configuration space page.
8(Below is a conceptual explanation in almost plain words.)
Each device has some resource. Someone needs to access that resource. This someone can be cpu or other devices.
CPU requests resources from the outside world by sending out addresses. These addresses are usually classified into different categories. Such as memory address or IO address. Different categories are called different address spaces, which implies different instructions.
Memory addresses work with load-store instructions such as mov. IO addresses with IO instructions such as in or out. Different flavors of CPU use different categorization schemas. Some companies prefer to use memory addresses to address everything, such as some Motorola CPUs. Some companies prefer to use separate memory and IO addresses, such as Intel. There's a saying that programmers like Motorola because they only need to care about load-store instructions. But electrical engineers like Intel because the separation of memory/IO addresses simplifies the hardware implementation.
Anyway, after addresses are put on the address bus, some device should respond to that address by placing data on the data bus. The hardware pieces are all connected together somehow. There's many switch/decoders along the way. With different addresses, different requests are routed to different places. Kind of like a network.
Each device in the system must know which requests it should respond. The devices tell this through address-mapping, i.e. a device remembers which addresses it should respond. And this usually comes in the form an address range.
Someone must tell a device such info. And that someone can be OS/BIOS/firmware. When they do this arrangement, they are doing the address-mapping.
For PCI/PCIe, we need to program the BAR decoder/register of the device to tell it the base address of the addresses arriving at it. And the PCIe device implicitly/inherently knows the address range size used by each BAR. And OS/FW/BIOS can know that by writing all 1s to the BAR register. With this base/size info, the PCIe device can accurately identify which BAR an arriving address falls into. And then properly calculate the offset from the arriving address. And finally access the RAM/registers implemented on the PCIe device.
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